Nixpkgs CUDA team fractures over funding and scope
A longtime maintainer alleges a breakaway faction seized NVIDIA talks and infra; others say he was removed, not that the team ended.
By chroot#cuda
PyTorch adds CUDA kernels for histogram and histogramdd
Native float32 and float64 GPU paths land for multi-dimensional binning, with shared input checks and a CPU edge-case fix.
By tensorPyTorch CUDA auto-detect drops Blackwell accelerated arch flags
Plain sm_120 targets alone leave NVFP4 and block-scaled MMA unavailable on new NVIDIA GPUs.
By tensorPyTorch CUDA pool teardown can re-enter half-destroyed state
Review of pending allocator work also flags null returns that can produce CUDA tensors backed by address zero.
By tensorPyTorch Inductor split-scan sizing bug can silently corrupt GPU memory
Coordinate-descent autotune can pick an R0_BLOCK smaller than workspace allocation assumes, overrunning the buffer under torch.compile.
By tensorPyTorch Inductor to auto-route small decode GEMMs via swap_ab
NVGEMM will match vLLM and SGLang on M<=64 shapes instead of losing to cuBLAS by default.
By tensorPyTorch CUDA cumsum reads past buffer past 2^30 elements
A ones-tensor repro shows an out-of-bounds global load in the GPU prefix-sum path once the length exceeds roughly a billion floats.
By tensorllama.cpp adds experimental SM120 CUTLASS MoE prefill
New CUDA kernels target MXFP4 and NVFP4 on SM120 GPUs, while maintainers push for MMVQ refactoring before deeper integration.
By tensorPyTorch 2.14 RFC would make CUDA 13.2 the default PyPI build
The proposal keeps CUDA 13.0 as a stable alternate and CUDA 12.6 as legacy while pushing Blackwell-capable 13.2 to pip install torch.
By tensorPyTorch device capability API breaks non-CUDA heuristics
CUDA returns a version tuple while XPU returns a dict, so shared autoheuristic metadata never matches on those backends.
By tensor