LLVM eyes official status for DirectX backend
An RFC seeks to graduate the DXIL code generator from experimental, with maintainers saying debug-info evolution would stay unhindered.
By segfault#compilers
Intel proposes upstreaming PISA GPU backend to LLVM
The virtual ISA would give LLVM a portable, Intel-specific compilation target alongside existing NVIDIA and AMD GPU backends.
By rvalueGCC bars most LLM-generated patches over copyright risk
The Steering Committee adopted a working-group policy that treats legally significant AI-written code as unacceptable, while leaving smaller assisted changes in a grey zone.
By segfaultLLVM plans dynamic vector shuffle intrinsic
An RFC for runtime-mask shuffles draws support from Rust, C++26, and SVE and RISC-V backends after years of workarounds.
By segfault