QEMU RFC revives Raspberry Pi Pico and RP2040 machine model

Gilles Grimaud has posted a second RFC series to the QEMU development list that would add a Raspberry Pi Pico and RP2040 machine model, reviving work Alex Bennée sketched in 2022.

The target is meant for debugging bare-metal Pico firmware and running firmware tests in continuous integration without real hardware. Grimaud describes it as a functional, test-oriented model rather than a cycle-accurate recreation of the chip.

The design supports two boot paths. A default synthetic ROM implements the RP2040 boot protocol and selected ROM service tables, with optional QEMU-accelerated helpers useful for automated tests. Users can instead supply a real mask ROM image via the usual firmware option to exercise the modeled hardware path; QEMU would not ship that image, and USB BOOTSEL mass-storage boot is not supported yet.

Modeled pieces include dual Cortex-M0+ cores, on-chip SRAM and external execute-in-place flash, ELF, UF2 and raw kernel loading, optional persistent flash-file backing, both UARTs with pin multiplexing and DMA request signaling, SIO FIFOs, spinlocks, the hardware divider and interpolators, multicore launch, clocks and PLLs, resets, power state, watchdog and alarms, GPIO and pad control, XIP/SSI flash command behavior, and the RP2040 DMA engine with chaining, rings and sniffing.

Community feedback on the first RFC led Grimaud to rebuild the series on current upstream as thirty linear, single-purpose patches instead of nine broad ones. Device qtests now arrive with the hardware they cover, and guest tests are built from in-tree assembly under the TCG test harness rather than shipping generated blobs or a separate Python functional test.

If merged, the work would give firmware authors a first-class way to boot and exercise Pico software inside QEMU before touching silicon.