Linux adds fwnode PCS API and dynamic phylink attach for external serdes
Christian Marangi’s v14 work gives PCS drivers a clock-style provider model and lets phylink gain or lose coding layers at runtime, with Airoha AN7581 as the first user.
Linux networking is gaining a proper firmware-node API for Physical Coding Sublayer (PCS) devices, the blocks between a MAC and the rest of the Ethernet physical layer. Christian Marangi posted a twelfth-revision patch set that registers PCS drivers as providers consumers look up by fwnode, in the same spirit as clocks and PHYs, and moves PCS selection and lifecycle control into phylink.
The change addresses a design that no longer matches the hardware. Early phylink assumed MAC and PCS lived in one driver and left selection to MAC callbacks. With 10G and similar links spreading into consumer SoCs, PCS blocks increasingly sit outside the MAC, which produced ad hoc export symbols and fragile attach logic. Marangi’s model has PCS drivers register and unregister as providers, while MAC drivers declare available PCS instances through phylink configuration. The older MAC-side select callback is treated as deprecated; a driver must use one approach or the other, not both.
Phylink now keeps its own PCS list and a mutable copy of supported interfaces so a coding layer can appear or vanish after the link is created. Notifiers fire when a provider is added or removed; matching PCS entries are linked or unlinked under the phylink state lock, supported modes are refreshed, and a resolve (with forced major reconfiguration when the active PCS disappears) restores or tears down the link. That covers probe deferral, late-loading modules, and driver removal races that previously needed special handling. Helpers parse pcs-handle properties from device tree or ACPI, and optional PCS link-down ops let hardware reset counters before the link returns.
Daniel Golle co-developed the fwnode foundation. The set documents the new PCS subsystem, lists Marangi as its maintainer, and lands a first consumer: PCS provider and phylink support for Airoha AN7581 Ethernet, PON, PCIe, and USB serdes (USXGMII, 10GBASE-R, 2500BASE-X, 1000BASE-X, SGMII), including external PHYs and SFP cages. Maxime Chevallier reviewed and tested parts of the work. A competing approach was set aside once this design handled the race conditions that had blocked consensus.